I have attempted the simulations with Modelsim 10.2 and 10.7a (the most recent version). Note that I have tried this using Quartus 13.1, 16.0 and 17.1. Loading of the other libraries in the project seems to be succesful and Modelsim does not complain. TACHYON CVC Ive used some pretty complex testbenches using many arrays (including floating point arrays), where the CVC. For some reason, Quartus is simply not generating the files that it needs to for Modelsim's use.
do file simply creates a different error. I have tried to manually locate the missing libraries, but including them in the. This is from a Qsys project containing a Clock Source, On-chip Flash (with dual boot setup), SPI to Avalon Master Bridge and 4 Pipeline Bridges. The design unit was not found.# Time: 0 ps Iteration: 0 Instance: /testbench_spi/dut/onchip_flash_0 File: e:/projects/trunk/max10/db/ip/basic_spi_to_flash/submodules/altera_onchip_flash.v Line: 305# Searched libraries:# E:/Projects/trunk/MAX10/simulation/modelsim/vhdl_libs/altera# E:/Projects/trunk/MAX10/simulation/modelsim/vhdl_libs/lpm# E:/Projects/trunk/MAX10/simulation/modelsim/vhdl_libs/sgate# E:/Projects/trunk/MAX10/simulation/modelsim/vhdl_libs/altera_mf# E:/Projects/trunk/MAX10/simulation/modelsim/vhdl_libs/altera_lnsim# E:/Projects/trunk/MAX10/simulation/modelsim/vhdl_libs/fiftyfivenm# E:/Projects/trunk/MAX10/simulation/modelsim/rtl_work# E:/Projects/trunk/MAX10/simulation/modelsim/basic_spi_to_flash# E:/Projects/trunk/MAX10/simulation/modelsim/basic_spi_to_flash
Modelsim questa verification#
The design unit was not found.# Time: 0 ps Iteration: 0 Instance: /testbench_spi/dut/dual_boot_0 File: e:/projects/trunk/max10/db/ip/basic_spi_to_flash/submodules/altera_dual_boot.v Line: 41# Searched libraries:# E:/Projects/trunk/MAX10/simulation/modelsim/vhdl_libs/altera# E:/Projects/trunk/MAX10/simulation/modelsim/vhdl_libs/lpm# E:/Projects/trunk/MAX10/simulation/modelsim/vhdl_libs/sgate# E:/Projects/trunk/MAX10/simulation/modelsim/vhdl_libs/altera_mf# E:/Projects/trunk/MAX10/simulation/modelsim/vhdl_libs/altera_lnsim# E:/Projects/trunk/MAX10/simulation/modelsim/vhdl_libs/fiftyfivenm# E:/Projects/trunk/MAX10/simulation/modelsim/rtl_work# E:/Projects/trunk/MAX10/simulation/modelsim/basic_spi_to_flash# E:/Projects/trunk/MAX10/simulation/modelsim/basic_spi_to_flash# Loading basic_spi_to_flash.altera_onchip_flash# Loading basic_spi_to_flash.altera_onchip_flash_avmm_data_controller# Loading basic_spi_to_flash.altera_onchip_flash_address_range_check# Loading basic_spi_to_flash.altera_onchip_flash_convert_address# ** Error: (vsim-3033) Instantiation of 'altera_onchip_flash_block' failed. Questa Design Solutions is an automated and integrated suite of verification tools that analyzes code at the design stage to detect bugs early, where they are cheapest and easiest to fix. # Loading basic_spi_to_flash.altera_dual_boot# ** Error: (vsim-3033) Instantiation of 'alt_dual_boot_avmm' failed. Everytime I try to run an RTL simulation from the synthesized Qsys block, I get two errors: I am have a severe and persistent problem with an attempt to simulate a MAX10 Qsys (platform designer) system in Modelsim.
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